SPWS027F - FEBRUARY 1997 - REVISED SEPTEMBER 1997
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
ThunderNET and ThunderSWITCH are trademarks of Texas Instruments Incorporated. Ethernet and Etherstat are trademarks of Xerox Corporation.
The ThunderSWITCH TNETX3150/TNETX3150A is a 15-port 10-/100-Mbit/s Ethernet shared-memory switch. The TNETX3150/TNETX3150A provides a complete low-cost switch solution. A desktop solution can be achieved by combining the TNETX3150/TNETX3150A, the necessary physical interfaces, and low-cost packet memory.
All 15 ports are full-duplex capable. With full-duplex capability, ports 03-14 can support 20-Mbit/s connections and ports 01-02 can support 200-Mbit/s connections to desktops or high-speed servers through external physical (PHY) layers. The uplink port 00 can provide a 400-Mbit/s (200 Mbit/s full duplex) connection for either external-switching fabric, external routing engine, or high-speed stacking links. ThunderSWITCH is capable of supporting VLAN for workgroup and segment-switching applications.
Data received from the media-access controller (MAC) interface is buffered in the RX FIFO before storage in external buffer memory under control of the queue management (QM) logic. Both QM and MAC blocks apply round-robin arbitration to maintain bandwidth and fast data transfer of the first-in, first-out (FIFO) subsystem without contention.
The TNETX3150/TNETX3150A has three modes for making forwarding decisions: internal single-address compare, external address match (EAM) interface, and frame tagging on the uplink port. All the 10-Mbit/s ports internally support switching a single MAC address per port. An EAM interface is supplied to support multiple addresses per port. External-address-matching hardware is required to support multiple users on one port. Ports 01 and 02 (10-/100-Mbit/s high-speed connection) are similarly restricted. The uplink port 00 does not have any internal address register and can support multiple addresses.
Upon transmission, frame data is obtained from the buffer memory and buffered temporarily into the TX FIFO before transmission on the relevant MAC port. If a collision occurs during transmission, data recovery and retransmission occur from the TX FIFO.
Statistics for the Etherstat and RMON management-information base are independently collected for each of the 15 ports. Access to the statistics counters is provided via the direct input/output (DIO) interface. The DIO interface is intended only for configuration and monitoring operations.
The TNETX3150/TNETX3150A utilizes a standard 60-ns memory solution (EDO DRAM).The packet memory has been implemented to effectively support both single-access operation and page-burst-access operation. All DRAM buffer transfers are made within a page boundary, permitting fast-burst accesses. A high-memory bandwidth is maintained, allowing all ports to be active without bottlenecking at the memory buffer. The TNETX3150/TNETX3150A allows any port configuration, including those that may exceed the maximum buffer-memory bandwidth. This can cause packets to be dropped. To avoid these conditions, the port configurations should be restricted so that the maximum allowable bandwidth to external buffer memory is not exceeded.
Packets are routed to local ports based on the destination MAC address. The cut-through feature enables transmission on the destination port before complete reception of the frame, which reduces the overall switch latency. The cut-through feature can be employed for all situations where the transmission port is slower or equal to the data rate on the receiving port. 100 Mbit/s can cut through to another 100-Mbit/s port or a 10-Mbit/s port. However, a 10-Mbit/s port cannot cut through to a 100-Mbit/s port. For this case, local cut-through is automatically disabled to prevent underflow. The cut-through feature can be disabled by either the receiving port or transmitting port, on a per-port basis, by setting the store-and-forward option bits in the port-control registers.
If the TNETX3150/TNETX3150A is operating in store-and-forward mode, the entire frame must be received before it is transmitted to the destination port. This provides the ability to filter frames that contain errors. This mode can be configured either by using the port control registers or is used automatically when transmitting from a low-speed to a high-speed port, since cut-through is not possible in this case.
The TNETX3150/TNETX3150A supports VLANs. This can be done two ways: 1) In the single-address-per-port mode, internal VLAN registers are used to configure the destination ports for broadcast/multicast packets. 2) The EAM interface provides a hardware mechanism to control broadcast/multicast packets based on the code provided on that interface. See EAM interface and VLAN support for more details.
The TNETX3150/TNETX3150A is fabricated with a 3.3-V technology. The inputs are 5-V tolerant and the 3.3-V outputs can directly interface to 5-V TTL-logic levels. This provides the customer with a broad choice of interfacing-device options.
The TNETX3150/TNETX3150A is JTAG compliant with one exception; they do require external pullup resistors on the TDI, TMS, and TRST\ input terminals.
View more information about generic part numbers:TNETX3150, TNETX3150A
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