TMS320C31, TMS320LC31 DIGITAL SIGNAL PROCESSORS

SPRS035A – MARCH 1996 – REVISED JULY 1997

features

High-Performance Floating-Point Digital Signal Processor (DSP):

TMS320C31-60 (5V)
33-ns Instruction Cycle Time
330 MOPS, 60 MFLOPS, 30 MIPS

TMS320C31-50 (5V)
40-ns Instruction Cycle Time
275 MOPS, 50 MFLOPS, 25MIPS

TMS320C31-40 (5V)
50-ns Instruction Cycle Time
220 MOPS, 40 MFLOPS, 20 MIPS

TMS320LC31-40 (3.3V)
50-ns Instruction Cycle Time
220 MOPS, 40 MFLOPS, 20 MIPS

TMS320C31-33 (5V)
60-ns Instruction Cycle Time
183.7 MOPS, 33.3 MFLOPS, 16.7 MIPS

TMS320LC31-33 (3.3V)
60-ns Instruction Cycle Time
183.7 MOPS, 33.3 MFLOPS, 16.7 MIPS

TMS320C31-27 (5V)
74-ns Instruction Cycle Time
148.5 MOPS, 27 MFLOPS, 13.5 MIPS

32-Bit High-Performance CPU

16-/32-Bit Integer and 32-/40-Bit Floating-Point Operations

32-Bit Instruction Word, 24-Bit Addresses

Two 1K x 32-Bit Single-Cycle Dual-Access On-Chip RAM Blocks

Boot-Program Loader

On-Chip Memory-Mapped Peripherals:
- One Serial Port
- Two 32-Bit Timers
- One-Channel Direct Memory Access (DMA) Coprocessor for Concurrent I/O and CPU Operation

Fabricated Using 0.7 Ω Enhanced Performance Implanted CMOS (EPIC^TM) Technology by Texas Instruments (TI^TM)

132-Pin Plastic Quad Flat Package (PQ Suffix)

Eight Extended-Precision Registers

Two Address Generators With Eight Auxiliary Registers and Two Auxiliary Register Arithmetic Units (ARAUs)

Two Low-Power Modes

Two- and Three-Operand Instructions

Parallel Arithmetic/Logic Unit (ALU) and Multiplier Execution in a Single Cycle

Block-Repeat Capability

Zero-Overhead Loops With Single-Cycle Branches

Conditional Calls, and Returns

Interlocked Instructions for Multiprocessing Support

Bus-Control Registers Configure Strobe-Control Wait-State Generation

EPIC and TI are trademarks of Texas Instruments Incorporated.

description

The TMS320C31 and TMS320LC31 DSPs are 32-bit, floating-point processors manufactured in 0.72 Ω triple-level-metal CMOS technology. The TMS320C31 and TMS320LC31 are part of the TMS320C3x generation of DSPs from Texas Instruments.

The TMS320C3x’s internal busing and special digital-signal-processing instruction set have the speed and flexibility to execute up to 60 million floating-point operations per second (MFLOPS). The TMS320C3x optimizes speed by implementing functions in hardware that other processors implement through software of microcode. This hardware-intensive approach provides performance previously unavailable on a single chip.

The TMS320C3x can perform parallel multiply and ALU operations on integer or floating-point data in a single cycle. Each processor also possesses a general-purpose register file, a program cache, dedicated ARAUs, internal dual-access memories, one DMA channel supporting concurrent I/O, and a short machine-cycle time. High performance and ease of use are results of these features.

General-purpose applications are greatly enhanced by the large address space, multiprocessor interface, internally and externally generated wait states, one external interface port, two timers, one serial port, and multiple-interrupt structure. The TMS320C3x supports a wide variety of system applications from host processor to dedicated coprocessor.

High-level-language support is easily implemented through a register-based architecture, large address space, powerful addressing modes, flexible instruction set, and well-supported floating-point arithmetic.

Title: DIGITAL SIGNAL PROCESSORS
Product Family: TMS320C3X FLOATING POINT DSP
Device Functionality: C3X, 32 BIT FLOATING POINT,3.3V,16-30MIPS
Orderable Devices: TMS320C31PQA, TMS320C31PQA40, TMS320C31PQA50, TMS320C31PQL, TMS320C31PQL40, TMS320C31PQL50, TMS320C31PQL60, TMS320C31PQA40, TMS320C31PQL40, TMS320C31PQA50, TMS320C31PQL50, TMS320C31PQL60, TMS320LC31PQ40, TMS320LC31PQ40

View the complete PDF datasheet: sprs035a.pdf (653 K Bytes) (Requires Acrobat Reader 3.x)

View more information about generic part numbers:TMS320C31, TMS320C31-40, TMS320C31-50, TMS320C31-60, TMS320LC31, TMS320LC31-40

Go to the Engineering Design Center to locate information on other TI Semiconductor devices.