TM2SJ64EPN 2097152 BY 64-BIT SYNCHRONOUS DYNAMIC RAM MODULES -- SODIMM

SMMS697A - AUGUST 1997 - REVISED NOVEMBER 1997

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features

• Organization:
  • TM2SJ64EPN . . . 2 097 152 x 64 Bits
• Single 3.3-V Power Supply (±10% Tolerance)
• Designed for 66-MHz 4-Clock Systems
• JEDEC 144-Pin Small-Outline Dual-In-Line Memory Module (SODIMM) Without Buffer for Use With Socket
• TM2SJ64EPN -- Uses Eight 16M-Bit Synchronous Dynamic RAMs (SDRAMs) (2M × 8-Bit) in Plastic Thin Small-Outline Packages (TSOP)
• Byte-Read/Write Capability
• Read Latencies 2 and 3 Supported
• Performance Ranges:
• Support Burst-Interleave and Burst-Interrupt Operations
• Burst Length Programmable to 1, 2, 4, and 8
• Two Banks for On-Chip Interleaving (Gapless Access)
• Ambient Temperature Range 0°C to 70°C
• Gold-Plated Contacts
• Pipeline Architecture
• High-Speed, Low-Noise Low-Voltage TTL (LVTTL) Interface
• Serial Presence-Detect (SPD) Using EEPROM

description

The TM2SJ64EPN is a 16M-byte, 144-pin small-outline dual-in-line memory module (SODIMM). The SODIMM is composed of eight TMS626812ADGE, 2097152 x 8-bit SDRAMs, each in a 400-mil, 44-pin plastic thin small-outline package (TSOP) mounted on a substrate with decoupling capacitors. See the TMS626812A data sheet (literature number SMOS691).

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