TM2SJ64EPU 2097152 BY 64-BIT SYNCHRONOUS DYNAMIC RAM MODULES -- SODIMM

SMMS687B - AUGUST 1997 - REVISED FEBRUARY 1998

features

Organization: 2 097 152 x 64 Bits
Single 3.3-V Power Supply (±10% Tolerance)
Designed for 66-MHz 4-Clock Systems
JEDEC 144-Pin Small-Outline Dual-In-Line Memory Module (SODIMM) Without Buffer for Use With Socket
Uses Eight 16M-Bit Synchronous Dynamic RAMs (SDRAMs) (2M × 8-Bit) in Plastic Thin Small-Outline Packages (TSOPs)
Byte-Read/Write Capability
Read Latencies 2 and 3 Supported
Performance Ranges:
Support Burst-Interleave and Burst-Interrupt Operations
Burst Length Programmable to 1, 2, 4, and 8
Two Banks for On-Chip Interleaving (Gapless Access)
Ambient Temperature Range 0°C to 70°C
Gold-Plated Contacts
Pipeline Architecture
High-Speed, Low-Noise Low-Voltage TTL (LVTTL) Interface

Serial Presence Detect (SPD) Using EEPROM

	SYNCHRONOUS CLOCK CYCLE TIME		ACCESS TIME CLOCK TO OUTPUT		REFRESH INTERVAL
	t_CK3 (CL = 3)	t_CK2 (CL = 2)	t_AC3 (CL = 3)	t_AC2 (CL = 2)
'xSJ64EPU-12A	12 ns	15 ns	9 ns	9 ns	64 ms
'xSJ64EPU-12	12 ns	18 ns	9 ns	10 ns	64 ms

-12A speed device is supported only at -5 to 10% V_DD CL = CAS latency

description

The TM2SJ64EPU is a 16M-byte, 144-pin small-outline dual-in-line memory module (SODIMM). The SODIMM is composed of eight TMS626812DGE, 2097152 x 8-bit SDRAMs, each in a 400-mil, 44-pin plastic thin small-outline package (TSOP) mounted on a substrate with decoupling capacitors. See the TMS626812 data sheet (literature number SMOS687).

Title: 2097152 BY 64-BIT SYNCHRONOUS DYNAMIC RAM MODULES-SODIMM
Product Family: SODIMM
Device Functionality: 16M, UNBUFFERED, (8) 2MX8 4K-SDRAM (TSOP)

View the complete PDF datasheet: smms687b.pdf (177 K Bytes) (Requires Acrobat Reader 3.x)

View more information about generic part numbers:TM2SJ64EPU

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