SMJS828B - SEPTEMBER 1996 - REVISED OCTOBER 1997
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44-PIN PSOP DBJ PACKAGE (TOP VIEW)
The is a 1048576 by 8-bit/524288 by 16-bit (8388608-bit), 3-V single-supply, programmable read-only memory device that can be electrically erased and reprogrammed. This device is organized as 1024K by 8 bits or 512K by 16 bits, divided into 19 sectors:
Any combination of sectors can be marked as read-only or erased. Full-chip erasure is also supported.
Sector data protection is afforded by methods that can disable any combination of sectors from write or read operations using standard programming equipment. An on-chip state machine provides an on-board algorithm that automatically pre-programs and erases any sector before it automatically programs and verifies program data at any specified address. The command set is compatible with that of the Joint Electronic Device Engineering Council (JEDEC) standards and is compatible with the JEDEC 8M-bit electrically erasable, programmable read-only memory (EEPROM) command set. A suspend/resume feature allows access to unaltered memory blocks during a section-erase operation. All outputs of this device are TTL-compatible. Additionally, an erase/suspend/resume feature supports reading data from, or programming data to, a sector that is not being erased.
Device operations are selected by writing JEDEC-standard commands into the command register using standard microprocessor write timings. The command register acts as an input to an internal-state machine which interprets the commands, controls the erase and programming operations, outputs the status of the device, outputs the data stored in the device, and outputs the device algorithm-selection code. On initial power up, the device defaults to the read mode. A hardware-reset pin initializes the internal-state machine to the read operation.
The device has low power dissipation with a 20-mA active read for the byte mode, 28-mA active read for the word mode, 30-mA typical program/erase current mode, and less than 60-uA standby current with a 5-uA deep-power-down mode. These devices are offered with 90-, 100-, and 120-ns access times. Table 1 and Table 2 show the sector-address ranges. The is offered in a 48-pin thin small-outline package (TSOP ) (DCD suffix) and a 44-pin plastic small-outline package (PSOP) (DBJ suffix).
View more information about generic part numbers:TMS29LF800B, TMS29LF800T
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