TPIC1321L 3-HALF H-BRIDGE GATE-PROTECTED LOGIC-LEVEL POWER DMOS ARRAY

SLIS042 - NOVEMBER 1994

features

Low r_DS(on) . . . 0.35 Typ
Voltage Output . . . 60 V
Input Protection Circuitry . . . 18 V
Pulsed Current . . . 4 A Per Channel
Extended ESD Capability . . . 4000 V
Direct Logic-Level Interface

description

The TPIC1321L is a monolithic gate-protected logic-level power DMOS array that consists of six electrically isolated N-channel enhancement-mode DMOS transistors configured as 3-half H-bridges. Each transistor features integrated high-current zener diodes (Z_CXa and Z_CXb)to prevent gate damage in the event that an overstress condition occurs. These zener diodes also provide up to 4000 V of ESD protection when tested using the human-body model of a 100-pF capacitor in series with a 1.5-k resistor.

The TPIC1321L is offered in a 24-pin wide-body surface-mount (DW) package and is characterized for operation over the case temperature of -40°C to 125°C.

Title: POWER DMOS ARRAY TRIPLE HALF H-BRIDGE GATE-PROTECTED LOGIC-LEVEL
Product Family: POWERPLUS ARRAYS
Device Functionality: POWER PLUS ARRAY

View the complete PDF datasheet: slis042.pdf (221 K Bytes) (Requires Acrobat Reader 3.x)

View more information about generic part numbers:TPIC1321L

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