TPIC5203 2-CHANNEL INDEPENDENT GATE-PROTECTED POWER DMOS ARRAY

SLIS040 - SEPTEMBER 1994

features

Low r_DS(on) . . . 0.26 Typ
High Voltage Output . . . 60 V
Extended ESD Capability . . . 4000 V
Pulsed Current . . . 8 A Per Channel
Fast Commutation Speed

description

The TPIC5203 is a monolithic gate-protected power DMOS array that consists of two independent electrically isolated N-channel enhancement-mode DMOS transistors. Each transistor features integrated high-current zener diodes (Z_CXa and Z_CXb) to prevent gate damage in the event that an overstress condition occurs. These zener diodes also provide up to 4000 V of ESD protection when tested using the human-body model of a 100-pF capacitor in series with a 1.5-k resistor.

The TPIC5203 is offered in a standard eight-pin small-outline surface-mount (D) package and is characterized for operation over the case temperature range of -40°C to 125°C.

Title: 2-CHANNEL INDEPENDENT GATE-PROTECTED POWER DMOS ARRAY
Product Family: POWERPLUS ARRAYS
Device Functionality: POWER PLUS ARRAY
Orderable Devices: TPIC5203D

View the complete PDF datasheet: slis040.pdf (195 K Bytes) (Requires Acrobat Reader 3.x)

View more information about generic part numbers:TPIC5203

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