TPIC5421L H-BRIDGE GATE-PROTECTED LOGIC-LEVEL POWER DMOS ARRAY

SLIS027A - OCTOBER 1994 - REVISED OCTOBER 1995

features

Low r_DS(on) . . . 0.4 Typ
Voltage Output . . . 60 V
Input Protection Circuitry . . . 18 V
Pulsed Current . . . 3 A Per Channel
Extended ESD Capability . . . 4000 V
Direct Logic-Level Interface

description

The TPIC5421L is a monolithic gate-protected logic-level power DMOS array that consists of four electrically isolated N-channel enhancement-mode DMOS transistors, two of which are configured with common source. Each transistor features integrated high-current zener diodes (Z_CXa and Z_CXb) to prevent gate damage in the event that an overstress condition occurs. These zener diodes also provide up to 4000 V of ESD protection when tested using the human-body model of a 100-pF capacitor in series with a 1.5-k resistor.

The TPIC5421L is offered in a 20-pin wide-body surface-mount (DW) package and a 16-pin thermally-enhanced dual-in-line (NE) package and is characterized for operation over the case temperature of -40°C to 125°C.

Title: H-BRIDGE GATE-PROTECTED LOGIC-LEVEL POWER DMOS ARRAY
Product Family: POWERPLUS ARRAYS
Device Functionality: POWER PLUS ARRAY
Orderable Devices: TPIC5421LNE

View the complete PDF datasheet: slis027a.pdf (212 K Bytes) (Requires Acrobat Reader 3.x)

View more information about generic part numbers:TPIC5421L

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