TLC555, TLC555Y LinCMOS^TM TIMERS

SLFS043C - SEPTEMBER 1983 - REVISED SEPTEMBER 1997

features

Very Low Power Consumption
1 mW Typ at V_DD = 5 V
Capable of Operation in Astable Mode
CMOS Output Capable of Swinging Rail to Rail
High Output-Current Capability
Sink 100 mA Typ
Source 10 mA Typ
Output Fully Compatible With CMOS, TTL, and MOS
Low Supply Current Reduces Spikes During Output Transitions
Single-Supply Operation From 2 V to 15 V
Functionally Interchangeable With the NE555; Has Same Pinout
ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015.2

description

The TLC555 is a monolithic timing circuit fabricated using the TI LinCMOS^TM

process. The timer is fully compatible with CMOS, TTL, and

MOS logic and operates at frequencies up to 2 MHz. Because of its high input impedance, this device uses smaller timing capacitors than those used by the NE555. As a result, more accurate time delays and oscillations are possible. Power consumption is low across the full range of power supply voltage.

Like the NE555, the TLC555 has a trigger level equal to approximately one-third of the supply voltage and a threshold level equal to approximately two-thirds of the supply voltage. These levels can be altered by use of the control voltage terminal (CONT). When the trigger input (TRIG) falls below the trigger level, the flip-flop is set and the output goes high. If TRIG is above the trigger level and the threshold input (THRES) is above the threshold level, the flip-flop is reset and the output is low. The reset input (RESET) can override all other inputs and can be used to initiate a new timing cycle. If RESET is low, the flip-flop is reset and the output is low. Whenever the output is low, a low-impedance path is provided between the discharge terminal (DISCH) and GND. All unused inputs should be tied to an appropriate logic level to prevent false triggering.

While the CMOS output is capable of sinking over 100 mA and sourcing over 10 mA, the TLC555 exhibits greatly reduced supply-current spikes during output transitions. This minimizes the need for the large decoupling capacitors required by the NE555.

The TLC555C is characterized for operation from 0°C to 70°C. The TLC555I is characterized for operation from - 40°C to 85°C. The TLC555M is characterized for operation over the full military temperature range of - 55°C to 125°C.

This device contains circuits to protect its inputs and outputs against damage due to high static voltages or electrostatic fields. These circuits have been qualified to protect this device against electrostatic discharges (ESD) of up to 2 kV according to MIL-STD-883C, Method 3015; however, it is advised that precautions be taken to avoid application of any voltage higher than maximum-rated voltages to these high-impedance circuits. During storage or handling, the device leads should be shorted together or the device should be placed in conductive foam. In a circuit, unused inputs should always be connected to an appropriated logic voltage level, preferably either supply voltage or ground. Specific guidelines for handling devices of this type are contained in the publication Guidelines for Handling Electrostatic-Discharge-Sensitive (ESDS) Devices and Assemblies available from Texas Instruments.

Title: LINCMOS TM TIMERS
Product Family: SPECIAL FUNCTIONS
Device Functionality: SINGLE TIMER
Orderable Devices: TLC555CD, TLC555CDR, TLC555CP, TLC555ID, TLC555IDR, TLC555IP, TLC555MFKB, TLC555MJG, TLC555MJGB, TLC555MP

View the complete PDF datasheet: slfs043c.pdf (301 K Bytes) (Requires Acrobat Reader 3.x)

View more information about generic part numbers:TLC555

Go to the Engineering Design Center to locate information on other TI Semiconductor devices.

TLC555, TLC555Y LinCMOSTM TIMERS

features

description

TLC555, TLC555Y LinCMOS^TM TIMERS