SMJ320MCM42A DUAL SMJ320C40 MULTICHIP MODULE

SGMS055A - NOVEMBER 1994 - REVISED MARCH 1996

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features

Performance
- 80 MFLOP With 496-Megabyte/s Burst I/O Rate for 40-MHz Modules
- 66 MFLOP With 409-Megabyte/s Burst I/O Rate for 33-MHz Modules
- 128K × 32 Zero-Wait-State Local Memory for Each Processor; Planned Migration to 512K × 32 Space
Compliant to MIL-I-38535 QML
Dual 'C40 Performance With Local Memory Requiring Only 8.2 Square Inches of Board Space
Enhanced Performance Offered By Multichip-Module Solution
- 56% Reduction in Number of Interconnects
- 30% Reduction (Minimum) in Board Area
- Estimated 20% Reduction in Power Dissipation Due to Reduced Parasitic Capacitance and Interconnect Lengths
Four Memory Ports for High Data Bandwidth
- Two Full 2G-Word External Buses
- Two Internal Buses Mapped to 128K × 32 SRAM Space Each
Ten External Communication Ports for Direct Processor-to-Processor Communication
IEEE-1149.1 (JTAG) Boundary Scan Compatible
408-Lead Ceramic Quad Flatpack Package (HFN Suffix)
Operating Temperature Range -55°C to 125°C
Communication-Port Connection Provided Between 'C40s for Interprocessor Communication
IEEE Standard 1149.1-1990 Standard Test-Access Port and Boundary-Scan Architecture

description

The 'MCM42A dual 'C40 multichip module (MCM) contains two SMJ320C40s with 128K × 32 zero-wait-state SRAMs mapped to each local bus. Global address and data buses with two sets of control signals are routed externally for each processor, allowing external memory to be accessed. The external global bus provides a continuous address reach of two gigawords.

The dual 'C40 configuration allows standard microprocessor initialization using the bootstrap loader. Both reset-vector-control pins are brought out to external pins for each processor. A single CLKIN line and a RESET line feed both processors in parallel, minimizing clock skew and allowing easy synchronization for interlocked operations.

Communication port 0 of CPU #1 is connected to communication port 3 of CPU #2 for direct processor-to-processor communication.

The IEEE-1149.1 (JTAG) test ports of the 'C40s are connected serially to allow scan operations and emulation of the module as a whole. Testability of the 'MCM42A adds value and reduces development and support costs. Texas Instruments (TI^TM) offers a wide variety of ANSI/IEEE-1149.1 products and support.

Title: DUAL MULTICHIP MODULE
Product Family: TMS320C4X FLOATING POINT DSP
Device Functionality: 32 BIT FLOATING POINT,5V
Orderable Devices: SM320MCM42AHFGL40, SM320MCM42AHFGM33, SM320MCM42AHFGM40

View the complete PDF datasheet: sgms055a.pdf (172 K Bytes) (Requires Acrobat Reader 3.x)

View more information about generic part numbers:SM320MCM42A

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