



SGMS034C - MAY 1989 - REVISED JUNE 1995
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
The SMJ44C256 series is a set of high-speed, 1048576-bit dynamic random access memories (DRAMs), organized as 262144 words of four bits each. These devices employ technology for high performance, reliability, and low power.
These devices feature maximum RAS\ access times of 80 ns, 100 ns,120 ns, and 150 ns. Maximum power dissipation is as low as 305 mW operating and 16.5 mW standby on 150-ns devices.
ICC peaks are 140 mA typical, and an input voltage undershoot of -1 V can be tolerated, minimizing system noise considerations.
All inputs and outputs, including clocks, are compatible with Series 54/174 TTL. All addresses and data-in lines are latched on-chip to simplify system design. Data out is unlatched to allow greater system flexibility.
The SMJ44C256 is offered in 20-pin ceramic dual-in-line packages (JD suffix) and 20/26-terminal ceramic leadless carriers (FQ/HL suffixes), 20/26-pin leaded carrier (HJ suffix), a 20-pin flatpack (HK suffix), and a 20-pin ceramic zig-zag in-line package (SV suffix). They are specified for operation from -55°C to125°C.
View more information about generic part numbers:SMJ44C256
Go to the Engineering Design Center to locate information on other TI Semiconductor devices.



