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Data Sheet Abstract

TSB12C01AM IEEE 1394-1995 HIGH-SPEED SERIAL-BUS LINK-LAYER CONTROLLER

SGLS088 - MARCH 1996

features

description

The TSB12C01AM is an IEEE 1394-1995 standard (from now on refered to as 1394) high-speed serial-bus link-layer controller that allows for easy integration into an I/O subsystem. The TSB12C01AM transmits and receives correctly formatted 1394 packets and generates and checks the 32-bit CRC. It is capable of being a cycle master and supports reception of isochronous data on two channels. It interfaces directly to the TSB21LV03M or the TSB14C01M physical layer chips. It also supports bus speeds of 100, 200, and 400 Mbps. The TSB12C01AM has a generic 32-bit host bus interface, which makes connection to most 32-bit host buses very simple. The TSB12C01AM has software-adjustable FIFOs for optimal FIFO size and performance characterization and allows for variable-size asynchronous-transmit FIFO (ATF), isochronous-transmit FIFO (ITF), and general-receive FIFO (GRF).

This document is not intended to serve as a tutorial on IEEE 1394-1995; users should refer to the 1394 serial bus for detailed information regarding the 1394 high-speed serial bus.


Title: IEEE 1394-1995 HIGH-SPEED SERIAL-BUS LINK-LAYER CONTROLLER
Product Family: ADVANCED BUS SOLUTIONS
Device Functionality: DATA TRANS, 1394

View the complete PDF datasheet: sgls088.pdf (194 K Bytes) (Requires Acrobat Reader 3.x)

View more information about generic part numbers:TSB12C01AM

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