SN54ACT7881 1024 × 18 CLOCKED FIRST-IN, FIRST-OUT MEMORY

SGAS004A - AUGUST 1995 - REVISED APRIL 1998

features

Member of the Texas Instruments Widebus^TM Family
Independent Asynchronous Inputs and Outputs
Read and Write Operations Can Be Synchronized to Independent System Clocks
Programmable Almost-Full/Almost-Empty Flag
Pin-to-Pin Compatible With SN74ACT7882, SN74ACT7884, and SN74ACT7811
Input-Ready, Output-Ready, and Half-Full Flags
Cascadable in Word Width and/or Word Depth
Fast Access Times of 13ns With a 50-pF Load
High Output Drive for Direct Bus Interface
Released as DSCC SMD (Standard Microcircuit Drawing) 5962-9562701QYA and 5962-9562701NXD
Package Options Include 68-Pin Ceramic Quad Flat (HV) and 80-Pin Plastic Quad Flat (PN) Packages
Widebus is a trademark of Texas Instruments Incorporated.

description

A FIFO memory is a storage device that allows data to be written into and read from its array at independent data rates. The SN54ACT7881 is organized as 1024 × 18 bits and processes data with rates up to 50 MHz and access times of 13 ns in a bit-parallel format. Data outputs are noninverting with respect to the data inputs. Expansion is accomplished easily in both word width and word depth.

The SN54ACT7881 has normal input-bus to output-bus asynchronous operation. The special enable circuitry adds the ability to synchronize independent reads and writes to their respective system clocks.

The SN54ACT7881 is characterized for operation over the full military temperature range of -55°C to 125°C.

Title: 1024 X 18 CLOCKED FIRST-IN, FIRST-OUT MEMORY
Product Family: SYNCHRONOUS FIFOS
Device Functionality: 1KX 18

View the complete PDF datasheet: sgas004a.pdf (213 K Bytes) (Requires Acrobat Reader 3.x)

View more information about generic part numbers:SN54ACT7881

Go to the Engineering Design Center to locate information on other TI Semiconductor devices.