TNETA1570 ATM SEGMENTATION AND REASSEMBLY DEVICE WITH INTEGRATED 64-BIT PCI-HOST INTERFACE

SDNS033B - JUNE 1995 - REVISED MAY 1996

features

• Single-Chip Segmentation and Reassembly Device (SAR) for Full-Duplex ATM-Adaptation-Layer (AAL) Processing
• Integrated 64-Bit Peripheral-Component Interface for Transferring Data and Control Information for Packet Segmentation and Packet Reassembly
• Provides Complete Encapsulation and Termination of AAL5 Packets
• Supports Both Transmit and Receive Buffer Chaining (Buffer Scatter/Gather)
• Provides for Early Segmentation of a Transmit Packet by Beginning the Segmentation Process Once a Transmit Buffer Is Available Instead of Waiting for the Entire Packet to Be Buffered
• Provides Full VPI/VCI Support and Allows for the Simultaneous Segmentation of 1023 Packets and the Simultaneous Reassembly of 30720 Packets
• Byte-Wide Cell Interface Is Full Duplex and Compliant to the ATM-Forum UTOPIA Document
• Cell Interface Can Be Programmed to Operate as Either a Physical (PHY)-Layer Interface or as a ATM-Layer Interface
• Provides Reassembly Time-Out for an Incoming Packet
• Provides a High-Priority Mechanism for Transmitting Constant-Bit-Rate Traffic
• Provides Support for Transparent/Null AAL

description

The TNETA1570 is an asynchronous transfer mode (ATM) segmentationand reassembly (SAR) device with a 64-bit peripheral componentinterconnect (PCI)-bus interface. This device incorporates ATMadaptation-layer (AAL) processing, ATM SAR processing for full-duplexoperation up to STS-3c rate of 155.52 Mbit/s, and the controls forthe register interface on the PHY layer. The device provides completeencapsulation and termination of AAL5 packets in hardware.

The TNETA1570 supports high-speed networking applicationsutilizing ATM protocols as either a backbone/backplane or desktoptechnology. Features include: high level of VPI/VCI support,high-priority segmentation option for constant-bit-rate traffic,early buffer segmentation, buffer scatter/gather capability, and32-/64-bit PCI-bus support.

The device contains an integrated 32-/64-bit PCI interface fortransferring data and control information. The segmentation andreassembly processes use host memory for storing packets that aretransmitted or received. No local-packet memory is required. Thedevice is capable of segmenting up to 1023 packets simultaneously andreassembling 30720 packets simultaneously. The device supports thefull range of VPI/VCI values for both transmit and receiveoperations.

The TNETA1570 also supports two methods of transporting atransparent/null AAL used for transferring proprietary information.In addition, the device recognizes ATM-layer OAM cells and provides amechanism for handling these cells. The device contains afull-duplex, byte-wide cell interface compliant to the ATM-ForumUTOPIA specification. The cell interface can be programmed to operateas either a PHY-layer interface or a ATM-layer interface.

The integrated PCI-host interface operates as either a 32-bit or64-bit interface for DMA operations. The device operates as a 64-bitinterface if the target device can accept 64-bit transfers;otherwise, it operates as a 32-bit interface. The PCI-host interfaceprovides both master and slave capability and operates at a frequencyup to 33 MHz. The PCI-host interface is functionally compliant to thePCI-local-bus specification revision 2.0. The TNETA1570 operation isexplained in detail in the Principles of Operation section.

View more information about generic part numbers:TNETA1570

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