SN54LS137, SN74LS137 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS WITH ADDRESS LATCHES

SDLS132 - JUNE 1978 - REVISED MARCH 1988

PRODUCTION DATA documents contain information current as of publicationdate. Products conform to specifications per the terms of Texas Instrumentsstandard warranty. Production processing does not necessarily include testingof all parameters.

features

Combines Decoder and 3-Bit Address Latch
Incorporates 2 Enable Inputs to Simplify Cascading
Low Power Dissipation … 65 mW Typ

description

The 'LS137 is a three-line to eight-line decoder/demultiplexer with latcheson the three address inputs. When the latch-enable input (GL\) islow, the 'LS137 acts as a decoder/demultiplexer. When GL\ goes fromlow to high, the address present at the select inputs (A, B, and C) is storedin the latches. Further address changes are ignored as long as GL\remains high. The output enable controls, G1 and G\2, control thestate of the outputs independently of the select or latch-enable inputs. Allof the outputs are high unless G1 is high and G\2 is low. The 'LS137is ideally suited for implementing glitch-free decoders in strobed (stored-address)applications in bus-oriented systems.

Title: 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS WITH ADDRESS LATCHES
Product Family: DEMULTIPLEXERS
Device Functionality: DECODER/DEMULTIPLEXERS
Orderable Devices: SN54LS137J, SNJ54LS137FK, SNJ54LS137J, SNJ54LS137W, SN74LS137D, SN74LS137DR, SN74LS137J, SN74LS137N, SN74LS137N3

View the complete PDF datasheet: sdls132.pdf (205 K Bytes) (Requires Acrobat Reader 3.x)

View more information about generic part numbers:SN54LS137, SN74LS137

Go to the Engineering Design Center to locate information on other TI Semiconductor devices.