SDLS125 - MARCH 1974 - REVISED MARCH 1988
PRODUCTION DATA documents contain information current as of publicationdate. Products conform to specifications per the terms of Texas Instrumentsstandard warranty. Production processing does not necessarily include testingof all parameters.
Each of these monolithic counters contains four master-slave flip-flopsand additional gating to provide a divide-by-two counter and a three-stagebinary counter for which the count cycle length is divide-by-five for the'90A and 'LS90, divide-by-six for the '92A and 'LS92, and the divide-by-eightfor the '93A and 'LS93.
All of these counters have a gated zero reset and the '90A and 'LS90 alsohave gated set-to-nine inputs for use in BCD nine's complement applications.
To use their maximum count length (decade, divide-by-twelve, or four-bitbinary) of these counters, the CKB input is connected to the QAoutput. The input count pulses are applied to CKA input and the outputs areas described in the appropriate function table. A symmetrical divide-by-tencount can be obtained from the '90A or 'LS90 counters by connecting the QD output to the CKA input and applying the input count to the CKB inputwhich gives a divide-by-ten square wave at output QA.
View more information about generic part numbers:SN74LS490
Go to the Engineering Design Center to locate information on other TI Semiconductor devices.