SDLS121 - DECEMBER 1983 - REVISED MARCH 1988
PRODUCTION DATA documents contain information current as of publicationdate. Products conform to specifications per the terms of Texas Instrumentsstandard warranty. Production processing does not necessarily include testingof all parameters.
The '76 contains two independent J-K flip-flops with individual J-K, clock,preset, and clear inputs. The '76 is a positive-edge-triggered flip-flop.J-K input is loaded into the master while the clock is high and transferredto the slave on the high-to-low transition. For these devices the J and Kinputs must be stable while the clock is high.
The 'LS76A contain two independent negative-edge-triggered flip-flops.The J and K inputs must be stable one setup time prior to the high-to-lowclock transition for predictable operation. The preset and clear are asynchronousactive low inputs. When low they override the clock and data inputs forcingthe outputs to the steady state levels as shown in the function table.
The SN5476 and the SN54LS76A are characterized for operation over the fullmilitary temperature range of -55°C to 125°C. The SN7476 and the SN74LS76Aare characterized for operation from 0°C to 70°C.
View more information about generic part numbers:SN5476, SN54LS76A, SN7476, SN74LS76A
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