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Data Sheet Abstract

SN5473, SN54LS73A, SN7473, SN74LS73A DUAL J-K FLIP-FLOPS WITH CLEAR

SDLS118 - DECEMBER 1983 - REVISED MARCH 1988


PRODUCTION DATA documents contain information current as of publicationdate. Products conform to specifications per the terms of Texas Instrumentsstandard warranty. Production processing does not necessarily include testingof all parameters.

features

 

description

The '73, and 'H73, contain two independent J-K flip-flops with individualJ-K, clock, and direct clear inputs. The '73, and 'H73, are positive pulse-triggeredflip-flops. J-K input is loaded into the master while the clock is high andtransferred to the slave on the high-to-low transition. For these devicesthe J and K inputs must be stable while the clock is high.

The 'LS73A contains two independent negative-edge-triggered flip-flops.The J and K inputs must be stable one setup time prior to the high-to-lowclock transition for predictable operation. When the clear is low, it overridesthe clock and data inputs forcing the Q output low and the Q\ outputhigh.

The SN5473, SN54H73, and the SN54LS73A are characterized for operationover the full military temperature range of -55°C to 125°C. The SN7473,and the SN74LS73A are characterized for operation from 0°C to 70°C.

 


Title: DUAL J-K FLIP-FLOPS WITH CLEAR
Product Family: D-TYPE (3-STATE) FLIP-FLOPS
Device Functionality: J-K
Orderable Devices: SN54LS73AJ, SNJ54LS73AFD, SNJ54LS73AJ, SNJ54LS73AW, SN7473N, SN7473N3, SN74LS73AD, SN74LS73ADR, SN74LS73AN

View the complete PDF datasheet: sdls118.pdf (250 K Bytes) (Requires Acrobat Reader 3.x)

View more information about generic part numbers:SN54LS73A, SN7473, SN74LS73A

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