SDLS071 - DECEMBER 1972 - REVISED MARCH 1988
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These universal, monolithic, 9-bit (8 data bits plus 1 parity bit) paritygenerators/checkers, utilize familiar Series 54/74 TTL circuitry and featureodd/even outputs and control inputs to facilitate operation in either oddor even-parity applications. Depending on whether even or odd parity is beinggenerated or checked, the even or odd inputs can be utilized as the parityor 9th-bit input. The word-length capability is easily expanded by cascading.
The SN54180/SN74180 are fully compatible with other TTL or DTL circuits.Input buffers are provided so that each data input represents only one normalizedseries 54/74 load. A full fan-out to 10 normalized series 54/74 loads is availablefrom each of the outputs at a low logic level. A fan-out to 20 normalizedloads is provided at a high logic level to facilitate the connection of unusedinputs to used inputs. Typical power dissipation is 170 mW.
The SN54180 is characterized for operation over the full military temperaturerange of -55°C to 125°C; and the SN74180 is characterized for operationfrom 0°C to 70°C.
View more information about generic part numbers:SN54180, SN74180
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