SDLS065 - MARCH 1974 - REVISED MARCH 1988
PRODUCTION DATA documents contain information current as of publicationdate. Products conform to specifications per the terms of Texas Instrumentsstandard warranty. Production processing does not necessarily include testingof all parameters.
The '170 and 'LS170 MSI 16-bit TTL register files incorporate the equivalentof 98 gates. The register file is organized as 4 words of 4 bits each andseparate on-chip decoding is provided for addressing the four word locationsto either write-in or retrieve data. This permits simultaneous writing intoone location and reading from another word location.
Four data inputs are available which are used to supply the 4-bit wordto be stored. Location of the word is determined by the write-address inputsA and B in conjunction with a write-enable signal. Data applied at the inputsshould be in its true form. That is, if a high-level signal is desired fromthe output, a high level is applied at the data input for that particularbit location. The latch inputs are arranged so that new data will be acceptedonly if both internal address gate inputs are high. When this condition exists,data at the D input is transferred to the latch output. When the write-enableinput, G\W, is high, the data inputs are inhibited andtheir levels can cause no change in the information stored in the internallatches. When the read-enable input, G\R, is high, thedata outputs are inhibited and remain high.
The individual address lines permit direct acquisition of data stored inany four of the latches. Four individual decoding gates are used to completethe address for reading a word. When the read address is made in conjunctionwith the read-enable signal, the word appears at the four outputs.
This arrangement — data-entry addressing separate from data-readaddressing and individual sense line — eliminates recovery times, permitssimultaneous reading and writing, and is limited in speed only by the writetime (30 nanoseconds typical) and the read time (25 nanoseconds typical).The register file has a nondestructive readout in that data is not lost whenaddressed.
All '170 inputs and all inputs except the read enable and write enableof the 'LS170 are buffered to lower the drive requirements to one Series 54/74or Series 54LS/74LS standard load, respectively. Input-clamping diodes minimizeswitching transients to simplify system design. High-speed, double-ended AND-OR-INVERTgates are employed for the read-address function and drive high-sink-current,open-collector outputs. Up to 256 of these outputs may be wire-AND connectedfor increasing the capacity up to 1024 words. Any number of these registersmay be paralleled to provide n-bit word length.
The SN54170 and SN54LS170 are characterized for operation over the fullmilitary temperature range of -55°C to 125°C; the SN74170 and SN74LS170are characterized for operation from 0°C to 70°C.
View more information about generic part numbers:SN54LS170, SN74170, SN74LS170
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