SDLS059 - DECEMBER 1972 - REVISED MARCH 1988
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Each of these monolithic, 4-line-to-16 line decoders utilizes TTL circuitryto decode four binary-coded inputs into one of sixteen mutually exclusiveopen-collector outputs when both the strobe inputs, G\1 and G\2, are low. The demultiplexing function is performed by using the 4input lines to address the output line, passing data from one of the strobeinputs with the other strobe input low. When either strobe input is high,all outputs are high. These demultiplexers are ideally suited for implementingMOS memory decoding or for interfacing with discrete memory address drivers.For ultra-high-speed applications, the SN54S138/SN74S138 or SN54S139/SN74S139is recommended.
These circuits are fully compatible for use with most other TTL circuits.Input clamping diodes are provided to minimize transmission-line effects andthereby simplify system design. Input buffers are used to lower the fan-inrequirement to only one normalized Series 54/74 load. A fan-out to 10 normalizedSeries 54/74 loads in the low-level state is available from each of the sixteenoutputs. Typical power dissipation is 170 mW.
The SN54159 is characterized for operation over the full military temperaturerange of -55°C to 125°C; the SN74159 is characterized for operationfrom 0°C to 70°C.
View more information about generic part numbers:SN74159
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