SDLS036 - DECEMBER 1983 - REVISED MARCH 1988
PRODUCTION DATA documents contain information current as of publicationdate. Products conform to specifications per the terms of Texas Instrumentsstandard warranty. Production processing does not necessarily include testingof all parameters.
The '107 contain two independent J-K flip-flops with individual J-K, clock,and direct clear inputs. The '107 is a positive pulse-triggered flip-flop.The J-K input data is loaded into the master while the clock is high and transferredto the slave and the outputs on the high-to-low clock transition. For thesedevices the J and K inputs must be stable while the clock is high.
The 'LS107A contain two independent negative-edge-triggered flip-flops.The J and K inputs must be stable prior to the high-to-low clock transitionfor predictable operation. When the clear is low, it overrides the clock anddata inputs forcing the Q output low and the Q\ output high.
The SN54107 and the SN54LS107A are characterized for operation over thefull military temperature range of -55°C to 125°C. The SN74107 andthe SN74LS107A are characterized for operation from 0°C to 70°C.
View more information about generic part numbers:SN54107, SN74107, SN74LS107A
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