SDLS024 - JANUARY 1991 - REVISED SEPTEMBER 1993
This 64-bit memory is a low-power Schottky memory array organizedas 16 words by 4 bits. It can be expanded in multiples of 15m + 1words or 4n bits, or both (where n is the number of packages in thevertical array and m is the number of packages in the horizontalarray), however some external gating is required (see Figure 1). Forlonger words using the SN74LS228, the IR signals of the first-rankpackages and OR signals of the last-rank packages must be ANDed forproper synchronization.
A first-in, first-out (FIFO) memory is a storage device thatallows data to be written into and read from its array at independentdata rates. These FIFOs are designed to process data at rates from 0to 10MHz in a bit-parallel format, word by word.
Data is written into memory on a low-to-high transition at theload-clock (LDCK) input and is read out on a low-to-high transitionat the unload-clock (UNCK) input. The memory is full when the numberof words clocked in exceeds by 16 the number of words clocked out.When the memory is full, LDCK signals have no effect on the dataresiding in memory. When the memory is empty, UNCK signals have noeffect.
Status of the FIFO memory is monitored by the input-ready (IR) andoutput-ready (OR) flags that indicate not-full and not-emptyconditions. IR is high only when the memory is not full and the LDCKis low. OR is high only when the memory is not empty and UNCK ishigh.
A low level on the clear (
)input resets the internal stack-control pointers and also sets IRhigh and OR low to indicate that old data remaining at the dataoutputs is invalid. Data outputs are noninverting with respect to thedata inputs and are at high impedance when the output-enable (OE)input is low. OE does not affect the IR and OR outputs.
The SN74LS228 is characterized for operation from 0°C to70°C.
View more information about generic part numbers:SN74LS228
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