SDLS011 - APRIL 1982 - REVISED MARCH 1988
PRODUCTION DATA documents contain information current as of publicationdate. Products conform to specifications per the terms of Texas Instrumentsstandard warranty. Production processing does not necessarily include testingof all parameters.
These devices contain two independent J-K negative-edge-triggered flip-flops.A low level at the preset and clear inputs sets or resets the outputs regardlessof the levels of the other inputs. When preset and clear are inactive (high),data at the J and K inputs meeting the setup time requirements are transferredto the outputs on the negative-going edge of the clock pulse. Clock triggeringoccurs at a voltage level and is not directly related to the rise time ofthe clock pulse. Following the hold time interval, data at the J and K inputsmay be changed without affecting the levels at the outputs. These versatileflip-flops can perform as toggle flip-flops by tying J and K high.
The SN54LS112A and SN54S112 are characterized for operation over the fullmilitary temperature range of -55°C to 125°C. The SN74LS112A and SN74S112Aare characterized for operation from 0°C to 70°C.
View more information about generic part numbers:SN54LS112A, SN54S112, SN74LS112A, SN74S112A
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