SN74BCT2420ADDRESS/DATA TRANSCEIVERS AND REGISTERS

SDIS007A - D3159, NOVEMBER 1988 - REVISED JANUARY 1989

features

Designed for NuBus^TM Interface Applications
Conforms to ANSI/IEEE Std 1196-1987
On-Chip Comparator Provides I/D Slot Identification
Multiplexed Real-Time and Latched Address/Data
Designed to Operate With SN74ACT2440 NuBus^TM Controller
BiCMOS Design Substantially Reduces Standby Current
Dependable Texas instruments Quality and Reliability

description

The 'BCT2420 consists of bus transceiver circuits, D-type flip-flops, latches, and control circuitry arranged for multiplexed transmission of address and data information in NuBus^TM applications. An on-chip comparator has been included to detect when a NuBus^TM transfer cycle is requesting the local board. The device conforms to ANSI/IEEE Std 1196-1987 and operates with Texas instruments SN74ACT2440 NuBus^TM Controller. In addition, the device is easily configured around ASIC or other PAL^® -based controllers.

The 'BCT2420 was designed using Texas Instruments BiCMOS process, which features bipolar drive characteristics and greatly reduces the standby power of the device when disabled. This feature is especially valuable when the device is not performing a NuBus^TM transaction.

The AEN\, DEN\ and ADEN\ inputs control the transceiver functions. Three 16-bit I/O ports, A15-A0, D15-D0, and AD\15-AD\0, provide for address and data transfer. When the NuBus^TM performs a write cycle to the local board, address information is saved on the rising edge of ACLK. During the last portion of the NuBus^TM write cycle, data information is saved on the rising edge of DCLK.

When the local board is performing a write to the NuBus^TM, address and data is multiplexed onto the NuBus^TM via the A\/D line. Address and data can be latched by using the ALE\ and DLE\ input lines respectively.

The IDEQ\ output is used to signal that the local board is being requested by the NuBus^TM. This output is typically fed to the NuBus^TM controller. IDEQ\ goes active (low) when AD\15-AD\12 are low and AD\11-AD\8 match ID\3-ID\0. IDEQ\ stays valid until the next address clock (ACLK) occurs. Internal 10-k pullup resistors are included on the ID\3-ID\0 inputs.

The SSEQ\ output is used to signal the local board that super-slot addresses are being requested. This output is active (low) whenever AD\15-AD\12 are equal to ID\3-AD\0, except when ID\3-ID\0 are all low.

In typical NuBus^TM applications, two devices are required to provide the full 32-bit address/data path. Refer to the typical NuBus^TM interface diagram on page 9 for additional information.

The SN74BCT2420 is characterized for operation from 0°C to 70°C.

Title: NUBUS ADDRESS/DATA TRANSCEIVERS AND REGISTERS
Product Family: BACKPLANE LOGIC (GTL, FB/FBPLUS, BTL, ETL)
Device Functionality: ADDRESS/DATA TRANSCEIVER

View the complete PDF datasheet: sdis007a.pdf (153 K Bytes) (Requires Acrobat Reader 3.x)

View more information about generic part numbers:SN74BCT2420

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