



SDFS071A - MARCH 1987 - REVISED OCTOBER 1993
These 8-bit universal shift/storage registers feature multiplexedI/O ports to achieve full 8-bit data handling in a single 20-pinpackage. Two function-select (S0, S1) inputs and two output-enable(
,
Synchronous parallel loading is accomplished by taking both S0 andS1 high. This places the 3-state outputs in a high-impedance stateand permits data that is applied on the I/O ports to be clocked intothe register. Reading out of the register can be accomplished whilethe outputs are enabled in any mode. Clearing occurs when the clear(
) input is low.Taking either
, or
The SN54F299 is characterized for operation over the full militarytemperature range of -55°C to 125°C. The SN74F299 ischaracterized for operation from 0°C to 70°C.
NOTE: a...h = the level of the steady-state input at inputsA through H, respectively. This data is loaded into the flip-flopswhile the flip-flop outputs are isolated from the I/Oterminals.
When one or both output-enable inputs are high the eightI/O terminals are disabled to the high-impedance state; however,sequential operation or clearing of the register is notaffected.
View more information about generic part numbers:SN74F299
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