SDFS062A - D2932, MARCH 1987 - REVISED OCTOBER 1993
These quadruple bus transceivers are designed for asynchronouscommunications between data buses. The control functionimplementation allows for maximum flexibility in timing. Thesedevices allow data transmission from the A bus to the B bus or fromthe B bus to the A bus depending upon the logic levels at theoutput-enable (OEBA and 
)inputs. The output-enable inputs can be used to disable the device sothat the buses are effectively isolated.
The dual-enable configuration gives the quadruple bus transceiversthe capability to store data by simultaneous enabling of OEBA and. Each outputreinforces its input in this transceiver configuration. Thus, whenboth control inputs are enabled and all other data sources to the twosets of bus lines are at high impedance, both sets of bus lines(eight in all) remain at their states. The 4-bit codes appearing onthe two sets of buses will be complementary for the ´F242.
The SN54F242 is characterized for operation over the full militarytemperature range of -55°C to 125°C. The SN74F242 ischaracterized for operation from 0°C to 70°C.
View more information about generic part numbers:SN74F242
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