SDFS051B - MARCH 1987 - REVISED JULY 1996
The ´F138 is designed to be used in high-performancememory-decoding or data-routing applications requiring very shortpropagation delay times. In high-performance memory systems, thesedecoders can be used to minimize the effects of system decoding. Whenemployed with high-speed memories utilizing a fast enable circuit,the delay times of this decoder and the enable time of the memory areusually less than the typical access time of the memory. This meansthat the effective system delay introduced by the decoder isnegligible.
The conditions at the binary-select inputs and the three enableinputs select one of eight output lines. Two active-low and oneactive-high enable inputs reduce the need for external gates orinverters when expanding. A 24-line decoder can be implementedwithout external inverters and a 32-line decoder requires only oneinverter. An enable input can be used as a data input fordemultiplexing applications.
The SN54F138 is characterized for operation over the full militarytemperature range of -55°C to 125°C. The SN74F138 ischaracterized for operation from 0°C to 70°C.
View more information about generic part numbers:SN54F138, SN74F138
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