SN54F74, SN74F74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

SDFS046A - MARCH 1987 - REVISED OCTOBER 1993

features

• Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs

description

These devices contain two independent positive-edge-triggeredD-type flip-flops. A low level at the preset () or clear () inputs sets or resets the outputsregardless of the levels of the other inputs. When and are inactive (high), data at thedata (D) input meeting the setup time requirements is transferred tothe outputs on the positive-going edge of the clock pulse. Clocktriggering occurs at a voltage level and is not directly related tothe rise time of the clock pulse. Following the hold-time interval,data at the D input may be changed without affecting the levels atthe outputs.

The SN54F74 is characterized for operation over the full militarytemperature range of -55°C to 125°C. The SN74F74 ischaracterized for operation from 0°C to 70°C.

The output levels are not guaranteed to meet the minimumlevels for V_OH. Furthermore, this configuration isnonstable; that is, it will not persist when or returns to its inactive (high) level.

View more information about generic part numbers:SN54F74, SN74F74

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