SN74F190A SYNCHRONOUS 4-BIT UP/DOWN DECADE COUNTER WITH RESET AND RIPPLE CLOCK

SDFS026B - D3690, JULY 1990 - REVISED OCTOBER 1993

features

• High-Speed f_max of 125 MHz Typical
• Single Down/Up Count Control Line
• Look-Ahead Circuitry Enhances Speed of Cascaded Counters
• Fully Synchronous in Count Modes
• Asynchronously Presettable With Load Control
• Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs

description

The SN74F190A is a synchronous, 4-bit decade reversible up/downcounter. Synchronous counting operation is provided by having allflip-flops clocked simultaneously so that the outputs changecoincident with each other when so instructed by the steering logic.This mode of operation eliminates the output counting spikes normallyassociated with asynchronous (ripple-clock) counters.

The outputs of the four flip-flops are triggered on alow-to-high-level transition of the clock (CLK) input if the enable() input is low.A high at inhibitscounting. The direction of the count is determined by the level ofthe down/up (D/U\) input. When D/U\ is low, the counter counts up,and when D/U\ is high, it counts down.

This counter features a fully independent clock circuit. Changesat the control ( and D/U\)inputs that modify the operating mode have no effect on the contentsof the counter until clocking occurs. The function of the counter isdictated solely by the condition meeting the stable setup and holdtimes. This counter is fully programmable; that is, it may be presetto any number between 0 and 9 by placing a low on the load input andentering the desired data at the data inputs. The output changes toagree with the data inputs independent of the level of the clockinput. This feature allows the counter to be used as a modulo-Ndivider by simply modifying the count length with the preset inputs.

Two outputs have been made available to perform the cascadingfunction: ripple clock and maximum/minimum count. The latter outputproduces a high-level output pulse with a duration approximatelyequal to one complete cycle of the clock while the count is minimum(0) counting down or maximum (9) counting up. The ripple-clock () output produces a low-leveloutput pulse under those same conditions, but only while the clockinput is low. The counter can easily be cascaded by feeding theripple-clock output to the enable input of the succeeding counter ifparallel clocking is used or to the clock input if parallel enablingis used. The maximum/minimum count (MAX/MIN) output can be used toaccomplish look-ahead for high speed operation.

The SN74F190A is characterized for operation from 0°C to70°C.

View more information about generic part numbers:SN74F190A

Go to the Engineering Design Center to locate information on other TI Semiconductor devices.

(c) Copyright 1998 Texas Instruments Incorporated. All rights reserved.
Trademarks, Important Notice!