



SDAS267A - DECEMBER 1982 - REVISED DECEMBER 1994
These 8-bit universal shift/storage registers feature multiplexedinput/output (I/O) ports to achieve full 8-bit data handling in a20-pin package. Two function-select (S0, S1) inputs and twooutput-enable (
,
Synchronous parallel loading is accomplished by taking both S0 andS1 high. This places the 3-state outputs in the high-impedance stateand permits data applied on the I/O ports to be clocked into theregister. Reading out of the register can be accomplished while theoutputs are enabled in any mode. Clearing occurs synchronously whenthe clear (
) input is low.Taking either
or
The SN54ALS323 is characterized for operation over the fullmilitary temperature range of -55°C to 125°C. TheSN74ALS323 is characterized for operation from 0°C to 70°C.
NOTE: a...h = the level of the steady-state input at inputsA through H, respectively. This data is loaded into the flip-flopswhile the flip-flop outputs are isolated from the I/Oterminals.
When one or both output-enable inputs are high, the eightI/O terminals are disabled to the high-impedance state; however,sequential operation or clearing of the register is notaffected.
View more information about generic part numbers:SN54ALS323, SN74ALS323
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