SDAS233A - DECEMBER 1983 - REVISED JANUARY 1995
This 8-bit latch features 3-state outputs designed
specifically for driving highly capacitive or relativelylow-impedance loads. This device is particularly suitable forimplementing buffer registers, I/O ports, bidirectional bus drivers,and working registers.
The eight latches are transparent D-type latches. The device hasnon-inverting data (D) inputs and provides true data at its outputs.
Because the clear (
) andpreset (
) inputs areindependent of the clock (CLK) input, taking and
The buffered output-enable (OE1\, OE2\, and OE3\) inputs can beused to place the eight outputs in either a normal logic state (highor low levels) or a high-impedance state. In the high-impedancestate, the outputs neither load nor drive the bus linessignificantly. The high-impedance state and increased drive providethe capability to drive bus lines without interface or pullupcomponents.
The output enables do not affect the internal operation of thelatches. Previously stored data can be retained or new data can beentered while the outputs are in the high-impedance state.
The -1 version of the SN74ALS845 is identical to the standardversion, except that the recommended maximum IOL for the-1 version is increased to 48 mA.
The SN74ALS845 is characterized for operation from 0°C to70°C.
View more information about generic part numbers:SN74ALS845
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