SDAS231A - JUNE 1984 - REVISED AUGUST 1995
These 9-bit flip-flops feature 3-state outputs designedspecifically for driving highly capacitive or relativelylow-impedance loads. These devices are particularly suitable forimplementing wider buffer registers, I/O ports, bidirectional busdrivers, parity bus interfacing, and working registers.
With the clock-enable (
)input low, the nine D-type edge-triggered flip-flops enter data onthe low-to-high transitions of the clock (CLK) input. Taking 
) input lowcauses the nine Q outputs to go low independently of the clock.
A buffered output-enable (
) input can be used to place the nine outputs in eithera normal logic state (high or low logic level) or the high- impedance state. In the high-impedance state, the outputs neitherload nor drive the bus lines significantly. The high-impedance stateand increased drive provide the capability to drive bus lines withoutinterface or pullup components.
does not affectthe internal operation of the flip-flops. Old data can be retained ornew data can be entered while the outputs are in the high-impedancestate.
The SN54AS823A is characterized for operation over the fullmilitary temperature range of -55°C to 125°C. TheSN74AS823A and SN74AS824A are characterized for operation from0°C to 70°C.
View more information about generic part numbers:SN54AS823A, SN74AS823A, SN74AS824A
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