SN54AS194, SN74AS194 4-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTERS

SDAS212A - DECEMBER 1983 - REVISED DECEMBER 1994

features

Parallel-to-Serial, Serial-to-Parallel Conversions
Left or Right Shifts
Parallel Synchronous Loading
Direct Overriding Clear
Temporary Data-Latching Capability
Package Options Include Plastic Small-Outline Packages (D), Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs

description

These 4-bit bidirectional universal shift registers featureparallel outputs, right-shift and left-shift serial (SR SER, SL SER)inputs, operating- mode-control (S0, S1) inputs, and a direct overriding clear () line. The registers have fourdistinct modes of operation:

Inhibit clock (temporary data latch/do nothing)
Shift right (in the direction Q_A toward Q_D)
Shift left (in the direction Q_D toward Q_A)
Parallel (broadside) load

Parallel synchronous loading is accomplished by applying the fourbits of data and taking both S0 and S1 high. The data is loaded intothe associated flip-flops and appears at the outputs after thepositive transition of the clock (CLK) input. During loading, serialdata flow is inhibited.

Shift right is accomplished synchronously with the rising edge ofthe clock pulse when S0 is high and S1 is low. Serial data for thismode is entered at the shift-right data input. When S0 is low and S1is high, data shifts left synchronously and new data is entered atthe shift-left serial inputs. Clocking of the flip-flop is inhibitedwhen both mode-control inputs are low.

The SN54AS194 is characterized for operation over the fullmilitary temperature range of -55°C to 125°C. The SN74AS194is characterized for operation from 0°C to 70°C.

H = high level (steady state); L = low level (steadystate); X = irrelevant (any input, including transitions); =transition from low to high level; a, b, c, d = the level ofsteady-state input at inputs A, B, C, or D, respectively;Q_A0, Q_B0, Q_C0, Q_D0= thelevel of Q_A, Q_B, Q_C, orQ_D, respectively, before the indicated steady-state inputconditions were established; Q_An, Q_Bn,Q_Cn, Q_Dn = the level of Q_A,Q_B, Q_C, respectively, before the most recenttransition of the clock.

Title: 4-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTERS
Product Family: SHIFT REGISTERS
Device Functionality: SHIFT REGISTERS
Orderable Devices: SN54AS194J, SNJ54AS194FK, SNJ54AS194J, SNJ54AS194W, SN74AS194D, SN74AS194DR, SN74AS194N

View the complete PDF datasheet: sdas212a.pdf (118 K Bytes) (Requires Acrobat Reader 3.x)

View more information about generic part numbers:SN54AS194, SN74AS194

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