SDAS210B - DECEMBER 1982 - REVISED DECEMBER 1994
PRODUCTION DATA information is current as of publication date. Productsconform to specifications per the terms of Texas Instruments standard warranty.Production processing does not necessarily include testing of all parameters.
The SN54ALS191 and SN74ALS191A are synchronous 4-bit reversible up/downbinary counters. Synchronous counting operation is provided by having allflip-flops clocked simultaneously so that the outputs change coincidentallywith each other when instructed by the steering logic. This mode of operationeliminates the output counting spikes normally associated with asynchronous(ripple-clock) counters.
The outputs of the four flip-flops are triggered on a low-to-high-leveltransition of the clock (CLK) input if the count enable (CTEN\)input is low. A high at CTEN\ inhibits counting. The direction ofthe count is determined by the level of the down/up (D/U\) input.When D/U\ is low, the counter counts up, and when D/U\is high, the counter counts down.
These counters feature a fully independent clock circuit. Changes at thecontrol inputs (CTEN\ and D/U\) that modify the operatingmode have no effect on the contents of the counter until clocking occurs.The function of the counter is dictated solely by the conditions meeting thestable setup and hold times.
These counters are fully programmable. Each output can be preset to eitherlevel by placing a low on the LOAD\input and entering the desireddata at the data inputs. The output changes to agree with the data inputsindependently of the level of the clock input. This feature allows the countersto be used as modulo-N dividers by simply modifying the count length withthe preset inputs.
CLK, D/U\, and LOAD\ are buffered to lower the driverequirement, which significantly reduces the loading on (current requiredby) clock drivers, for long parallel words.
Two outputs are available to perform the cascading function: ripple clockand maximum/minimum count. The latter output produces a high-level outputpulse with a duration approximately equal to one complete cycle of the clockwhile the count is minimum (0) counting down or maximum (15) counting up.The ripple-clock output (RCO\) produces a low-level output pulseunder those same conditions, but only while the clock input is low. The countereasily can be cascaded by feeding the ripple-clock output to the enable inputof the succeeding counter if parallel clocking is used or to the clock inputif parallel enabling is used. The maximum/minimum count (MAX/MIN) output canbe used to accomplish look ahead for high-speed operation.
The SN54ALS191 is characterized for operation over the full military temperaturerange of -55°C to 125°C. The SN74ALS191A is characterized for operationfrom 0°C to 70°C.
View more information about generic part numbers:SN54ALS191
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