



SDAS207C - APRIL 1982 - REVISED OCTOBER 1995
These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. All have a direct-clear (CLR\) input, and the ŽALS175, SN54AS175A, and SN74AS175B feature complementary outputs from each flip-flop.
Information at the data (D) inputs meeting the setup-time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock (CLK) input is at either the high or low level, the D-input signal has no effect at the output.
These circuits are fully compatible for use with most TTL circuits.
The SN54ALS174, SN54ALS175, SN54AS174, and SN54AS175A are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS174, SN74ALS175, SN74AS174, and SN74AS175B are characterized for operation from 0°C to 70°C
View more information about generic part numbers:SN54AS175A
Go to the Engineering Design Center to locate information on other TI Semiconductor devices.



