SDAS167B - APRIL 1982 - REVISED JULY 1996
These octal D-type edge-triggered flip-flops feature 3-stateoutputs designed specifically for driving highly capacitive orrelatively low-impedance loads. They are particularly suitable forimplementing buffer registers, I/O ports, bidirectional bus drivers,and working registers.
On the positive transition of the clock (CLK) input, the Q outputsare set to the logic levels set up at the data (D) inputs.
A buffered output-enable (
) input places the eight outputs in either a normallogic state (high or low logic levels) or a high-impedance state. Inthe high-impedance state, the outputs neither load nor drive the buslines significantly. The high-impedance state and the increased driveprovide the capability to drive bus lines without interface or pullupcomponents.
does not affectinternal operations of the flip-flops. Old data can be retained ornew data can be entered while the outputs are in the high-impedancestate.
The SN54ALS374A and SN54AS374 are characterized for operation overthe full military temperature range of -55°C to 125°C. TheSN74ALS374A and SN74AS374 are characterized for operation from0°C to 70°C.
View more information about generic part numbers:SN54ALS374A, SN54AS374, SN74ALS374A, SN74AS374
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