SDAS163A - DECEMBER 1982 - REVISED JANUARY 1995
These 8-bit D-type transparent latches feature 3-state outputsdesigned specifically for driving highly capacitive or relativelylow-impedance loads. They are particularly suitable for implementingbuffer registers, I/O ports, bidirectional bus drivers, and workingregisters.
While the latch-enable (LE) input is high, the Q outputs followthe complements of data (D) inputs. When LE is taken low, the outputsare latched at the inverses of the levels set up at the D inputs.
A buffered output-enable (
) input places the eight outputs in either a normallogic state (high or low logic levels) or a high-impedance state. Inthe high-impedance state, the outputs neither load nor drive the buslines significantly. The high-impedance state and increased highlogic level provide the capability to drive bus lines withoutinterface or pullup components.
does not affectinternal operations of the latches. Old data can be retained or newdata can be entered while the outputs are in the high-impedancestate.
The SN54ALS563B is characterized for operation over the fullmilitary temperature range of -55°C to 125°C. TheSN74ALS563B is characterized for operation from 0°C to70°C.
View more information about generic part numbers:SN54ALS563B
Go to the Engineering Design Center to locate information on other TI Semiconductor devices.