SDAS157B - JUNE 1982 - REVISED DECEMBER 1994
The ´ALS165 are parallel-load 8-bit serial shift registersthat, when clocked, shift the data toward serial (QH andQ\H) outputs. Parallel-in access to each stage is providedby eight individual direct data (A-H) inputs that are enabled by alow level at the shift/load (SH/
)input. The ´ALS165 have a clock-inhibit function andcomplemented serial outputs.
Clocking is accomplished by a low-to-high transition of the clock(CLK) input while SH/ is held highand the clock inhibit (CLK INH) input is held low. The functions ofCLK and CLK INH are interchangeable. Since a low CLK and alow-to-high transition of CLK INH also accomplishes clocking, CLK INHshould be changed to the high level only while CLK is high. Parallelloading is inhibited when SH/ isheld high. The parallel inputs to the register are enabled whileSH/ is low independently of the levelsof the CLK, CLK INH, or serial (SER) inputs.
The SN54ALS165 is characterized for operation over the fullmilitary temperature range of -55°C to 125°C. TheSN74ALS165 is characterized for operation from 0°C to 70°C.
View more information about generic part numbers:SN54ALS165, SN74ALS165
Go to the Engineering Design Center to locate information on other TI Semiconductor devices.