SDAS145B - JANUARY 1986 - REVISED JANUARY 1995
These 10-bit edge-triggered D-type flip-flops feature 3-stateoutputs designed specifically for driving highly capacitive orrelatively low-impedance loads. These devices are particularlysuitable for implementing wider buffer registers, I/O ports,bidirectional bus drivers with parity, and working registers.
On the positive transition of the clock (CLK) input, the Q outputsare true to the data (D) input.
A buffered output-enable (
) input can place the ten outputs in either a normallogic state (high or low logic levels) or a high-impedance state. Theoutputs also are in the high-impedance state during power-up andpower-down conditions. The outputs remain in the high-impedance statewhile the device is powered down. In the high-impedance state, theoutputs neither load nor drive the bus lines significantly. Thehigh-impedance state and increased drive provide the capability todrive bus lines without interface or pullup components.
does not affectthe internal operation of the flip-flops. Old data can be retained ornew data can be entered while the outputs are in the high-impedancestate.
The SN54ALS29821 is characterized for operation over the fullmilitary temperature range of -55°C to 125°C. TheSN74ALS29821 is characterized for operation from 0°C to70°C.
View more information about generic part numbers:SN54ALS29821, SN74ALS29821
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