SN74AS1821 10-BIT BUS INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS SDAS131 – APRIL 1987

features

• Center V_CC and GND Configuration Provides Minimum Lead Inductance in High Current Switching Applications
• Provides Extra Data Width Necessary for Wider Address/Data Paths or Buses with Parity
• Outputs Have Undershoot Protection Circuitry
• Power-Up High-Impedance State
• Package Options include Plastic DIPS. Use the 'AS821 for Plastic and Ceramic Chip Carriers and "Small Outline" Package Options.
• Buffered Control inputs to Reduce DC Loading Effects

description

This 10-bit flip-flop device features three-state outputs designedspecifically for driving highly capacitive or relativelylow-impedance loads. It is particularly suitable for implementingwider buffer registers, I/O ports, bidirectional bus drivers withparity, and working registers. The ten flip-flops are edge-triggeredD-type flip-flops. On the positive transition of the clock, the Qoutputs on the 'AS1821 will be true.

A buffered output-control input can be used to place the tenoutputs in either a normal logic state (high or low levels) or ahigh-impedance state. In the high-impedance state the outputs neitherload nor drive the bus lines significantly. The high-impedance stateand increased drive provide the capability to drive the bus lines ina bus-organized system without need for interface or pull-upcomponents. The output control () does not affect the internal operation of theflipflops. Old data can be retained or new data can be entered whilethe outputs are in the high-impedance state.

The SN74AS1821 is characterized for operation from 0°C to70°C.

View more information about generic part numbers:SN74AS1821

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