SN74ALS235 64 × 5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY

SDAS108A - OCTOBER 1986 - REVISED SEPTEMBER 1993

features

Asynchronous Operation
Organized as 64 Words by 5 Bits
Data Rates From 0 to 25 MHz
3-State Outputs
Package Options Include Plastic Small-Outline Packages (DW), Plastic J-Leaded Chip Carriers (FN), and Standard Plastic 300-mil DIPs (N)
IMPACT is a trademark of Texas Instruments Incorporated.

description

The SN74ALS235 is a 320-bit memory utilizing advanced low-powerSchottky IMPACT^TM technology. It features high speed withfast fall-through times and is organized as 64 words by 5 bits.

A first-in, first-out (FIFO) memory is a storage device thatallows data to be written into and read from its array at independentdata rates. The SN74ALS235 is designed to process data at rates from0 to 25 MHz in a bit-parallel format, word by word.

Data is written into memory on the rising edge of the shift-in(SI) input. When SI goes low, the first data word ripples through tothe output (see Figure 1). As the FIFO fills up, the data words stackup in the order they were written. When the FIFO is full, additionalshift-in pulses have no effect. Data is shifted out of memory on thefalling edge of the shift-out (SO) input (see Figure 2). When theFIFO is empty, additional SO pulses have no effect. The last dataword remains at the outputs until a new word falls through or reset() goes low.

Status of the SN74ALS235 FIFO memory is monitored by theoutput-ready (OR), input-ready (IR), almost-full/almost-empty(AF/AE), and half-full (HF) flags. When OR is high, valid data isavailable at the outputs. OR is low when SO is high and stays lowwhen the FIFO is empty. IR is high when the inputs are ready toreceive more data. IR is low when SI is high and stays low when theFIFO is full. AF/AE is high when the FIFO contains eight or lesswords (see Figure 5) or 56 or more words (see Figure 6). AF/AE is lowwhen the FIFO contains between nine and 55 words. HF is high when theFIFO contains 32 or more words and is low when the FIFO contains 31words or less (see Figure 7).

When the FIFO is empty, input data is shifted to the outputautomatically when SI goes low. If SO is held high during this time,the OR flag pulses high indicating valid data at the outputs (seeFigure 3).

When the FIFO is full, data can be shifted in automatically byholding SI high and taking SO low. One propagation delay after SOgoes low, IR will go high. If SI is still high when IR goes high,data at the inputs are automatically shifted in. Since IR is normallylow when the FIFO is full and SI is high, only a high-level pulse isseen on the IR output.

The FIFO must be reset after power up with a low-level pulse onthe master reset () input. Thissets IR high and OR low signifying that the FIFO is empty. Resettingthe FIFO sets the outputs to a low logic level (see Figure 1). If SIis high when goes high, theinput data is shifted in and IR goes low and remains low until SIgoes low. If SI goes low before goeshigh, the input data will not be shifted in and IR goes high. Dataoutputs are noninverting with respect to the data inputs and are athigh impedance when the output-enable () input is high. does not affect the status-flagoutputs (see Figure 2).

The SN74ALS235 is characterized for operation from 0°C to70°C.

Title: 64 X 5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY
Product Family: ASYNCHRONOUS FIFOS
Device Functionality: 16 X 5 ASYNCHRONOUS FIFO

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