SN74ALS234 64 × 4 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY

SDAS106B - OCTOBER 1986 - REVISED SEPTEMBER 1993

features

Asynchronous Operation
Organized as 64 Words by 4 Bits
Data Rates From 0 to 30 MHz
3-State Outputs
Package Options Include Plastic Small-Outline Packages (DW), Plastic J-Leaded Chip Carriers (FN), and Standard Plastic 300-mil DIPs (N)
IMPACT is a trademark of Texas Instruments Incorporated.

description

The SN74ALS234 is a 256-bit memory utilizing advanced low-powerSchottky IMPACT^TM technology. It features high speed withfast fall-through times and is organized as 64 words by 4 bits.

A first-in, first-out (FIFO) memory is a storage device thatallows data to be written into and read from its array at independentdata rates. The SN74ALS234 is designed to process data at rates from0 to 30 MHz in a bit-parallel format, word by word. Data is writteninto memory on the rising edge of the shift-in (SI) input. When SIgoes low, the first data word ripples through to the output (seeFigure 1). As the FIFO fills up, the data words stack up in the orderthey were written. When the FIFO is full, additional shift-in pulseshave no effect. Data is shifted out of memory on the falling edge ofthe shift-out (SO) input (see Figure 2). When the FIFO is empty,additional SO pulses have no effect. The last data word remains atthe outputs until a new word falls through or reset () goes low.

Status of the SN74ALS234 FIFO memory is monitored by theoutput-ready (OR) and input-ready (IR) flags. When OR is high, validdata is available at the outputs. OR is low when SO is high and stayslow when the FIFO is empty. IR is high when the inputs are ready toreceive more data. IR is low when SI is high and stays low when theFIFO is full.

When the FIFO is empty, input data is shifted to the outputautomatically when SI goes low. If SO is held high during this time,the OR flag pulses high indicating valid data at the outputs (seeFigure 3).

When the FIFO is full, data can be shifted in automatically byholding SI high and taking SO low. One propagation delay after SOgoes low, IR will go high. If SI is still high when IR goes high,data at the inputs are automatically shifted in. Since IR is normallylow when the FIFO is full and SI is high, only a high-level pulse isseen on the IR output (see Figure 4).

The FIFO must be reset after power up with a low-level pulse onthe master reset () input. Thissets IR high and OR low signifying that the FIFO is empty. Resettingthe FIFO sets the outputs to a low logic level (see Figure 1). If SIis high when goes high, theinput data is shifted in and IR goes low and remains low until SIgoes low. If SI goes low before goeshigh, the input data will not be shifted in and IR goes high. Dataoutputs are noninverting with respect to the data inputs and are athigh impedance when the output-enable () input is high. does not affect the IR or OR.

The SN74ALS234 is characterized for operation from 0°C to70°C.

Title: 64 X 4 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY
Product Family: ASYNCHRONOUS FIFOS
Device Functionality: 16 X 4 ASYNCHRONOUS FIFO

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View more information about generic part numbers:SN74ALS234

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