



SDAS059C - DECEMBER 1983 - REVISED JANUARY 1995
These 10-bit latches feature 3-state outputs designed specificallyfor driving highly capacitive or relatively low-impedance loads. Theyare particularly suitable for implementing buffer registers, I/Oports, bidirectional bus drivers, and working registers.
The ten latches are transparent D-type latches. The SN74ALS841 andSN74AS841A have noninverting data (D) inputs. The SN74ALS842 hasinverting D\ inputs.
A buffered output-enable (
) input places the ten outputs in either a normal logicstate (high or low logic levels) or a high-impedance state. In thehigh-impedance state, the outputs neither load nor drive the buslines significantly. The high-impedance state and increased driveprovide the capability to drive bus lines without interface or pullupcomponents.
does not affectthe internal operation of the latches. Previously stored data can beretained or new data can be entered while the outputs are off.
The SN74ALS841, SN74AS841A, and SN74ALS842 are characterized foroperation from 0°C to 70°C.
View more information about generic part numbers:SN74ALS841, SN74ALS842, SN74AS841A
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