SDAS024A - D2661, APRIL 1982 - REVISED MAY 1986
These synchronous, presettable counters feature an internal carrylook-ahead for application in high-speed counting designs. The'ALS160B, 'ALS162B, 'AS160, and 'AS162 are decade counters, and the'ALS161B, 'ALS163B, 'AS161, and 'AS163 are 4-bit binary counters.Synchronous operation is provided by having all flip-flops clockedsimultaneously so that the outputs change coincident with each otherwhen so instructed by the count-enable inputs and internal gating.This mode of operation eliminates the output counting spikes that arenormally associated with asynchronous (ripple clock)
counters. A buffered clock input triggers the four flip-flops onthe rising (positive-going) edge of the clock input waveform.
These counters are fully programmable; that is, they may be presetto any number between 0 and 9, or 15. As presetting is synchronous,setting up a low level at the load input disables the counter andcauses the outputs to agree with the setup data after the next clockpulse regardless of the levels of the enable inputs.
The clear function for the 'ALS160B, 'ALS161B, 'AS160, and 'AS161is asynchronous and a low level at the clear input sets all four ofthe flip-flop outputs low regardless of the levels of the clock,load, or enable inputs. This synchronous clear allows the countlength to be modified easily by decoding the Q outputs for themaximum count desired. The active-low output of the gate used fordecoding is connected to the clear input to synchronously clear thecounter to 0000 (LLLL).
The carry look-ahead circuitry provides for cascading counters forn-bit synchronous applications without additional gating.Instrumental in accomplishing this function are two count-enableinputs and a ripple carry output. Both count-enable inputs (ENP andENT) must be high to count, and ENT is fed forward to enable theripple carry output. The ripple carry output (RCO) thus enabled willproduce a high-level pulse while the count is maximum (9 or 15 withQA high). This high-level overflow ripple carry pulse canbe used to enable successive cascaded stages. Transitions at the ENPor ENT are allowed regardless of the level of the clock input.
These counters feature a fully independent clock circuit. Changesat control inputs (ENP, ENT, or
) that will modify the operating mode have no effect onthe contents of the counter until clocking occurs. The function ofthe counter (whether enabled, disabled, loading, or counting) will bedictated solely by the conditions meeting the stable setup and holdtimes.
The SN54ALS160B through SN54ALS163B and SN54AS160 throughSN54AS163 are characterized for operation over the full militarytemperature range of -55°C to 125°C. The SN74ALS160Bthrough SN74ALS163B and SN74AS160 through SN74AS163 are characterizedfor operation from 0°C to 70°C.
View more information about generic part numbers:SN74ALS160B, SN74ALS162B, SN74AS160, SN74AS162
Go to the Engineering Design Center to locate information on other TI Semiconductor devices.