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Data Sheet Abstract

SN54AS825A, SN74AS825A 8-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

SDAS020B - JUNE 1984 - REVISED AUGUST 1995


 

features

 

description

These 8-bit flip-flops feature 3-state outputs designedspecifically for driving highly capacitive or relativelylow-impedance loads. These devices are particularly suitable forimplementing multiuser registers, I/O ports, bidirectional busdrivers, and working registers.

With the clock-enable ()input low, the eight D-type edge-triggered flip-flops enter data onthe low-to-high transitions of the clock (CLK) input. Taking high disables the clock buffer,latching the outputs. These devices have noninverting data (D)inputs. Taking the clear ()input low causes the eight Q outputs to go low independently of theclock.

Multiuser buffered output-enable (,, and ) inputs can be used to place theeight outputs in either a normal logic state (high or low logiclevel) or a high-impedance state. In the high-impedance state, theoutputs neither load nor drive the bus lines significantly. Thehigh-impedance state and increased drive provide the capability todrive bus lines without interface or pullup components.

The output enables do not affect the internal operation of theflip-flops. Old data can be retained or new data can be entered whilethe outputs are in the high-impedance state.

The SN54AS825A is characterized for operation over the fullmilitary temperature range of -55°C to 125°C. TheSN74AS825A is characterized for operation from 0°C to 70°C.

 

 

= H if any ofOE1\, OE2\, or OE3\ are high. = L if all ofOE1\, OE2\, or OE3\ are low.


Title: 8-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS
Product Family: D-TYPE (3-STATE) FLIP-FLOPS
Device Functionality: BUS INTERFACE FLIP-FLOPS
Orderable Devices: 5962-9078003MLA, SNJ54AS825AFK, SNJ54AS825AW, SN74AS825ADW, SN74AS825ADWR, SN74AS825ANT

View the complete PDF datasheet: sdas020b.pdf (101 K Bytes) (Requires Acrobat Reader 3.x)

View more information about generic part numbers:SN54AS825A, SN74AS825A

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