SN54AHCT74, SN74AHCT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

SCLS263G - DECEMBER 1995 - REVISED DECEMBER 1997

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features

• Inputs Are TTL-Voltage Compatible
• EPIC^TM (Enhanced-Performance Implanted CMOS) Process
• High Latch-Up Immunity Exceeds 250 mA Per JESD 17
• ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
• Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), Thin Very Small-Outline (DGV), Thin Shrink Small-Outline (PW), and Ceramic Flat (W) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs

EPIC is a trademark of Texas Instruments Incorporated.

description

The 'AHCT74 devices are dual positive-edge-triggered D-type flip-flops.

A low level at the preset (PRE\) or clear (CLR\) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE\ and CLR\ are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.

The SN54AHCT74 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74AHCT74 is characterized for operation from -40°C to 85°C

View more information about generic part numbers:SN54AHCT74, SN74AHCT74

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