



SCLS198B - FEBRUARY 1993 - REVISED APRIL 1996
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These octal transparent D-type latches are designed for 2.7-V to5.5-V VCC operation.
The 'LV573 feature 3-state outputs designed specifically fordriving highly capacitive or relatively low-impedance loads. Thisdevice is particularly suitable for implementing buffer registers,I/O ports, bidirectional bus drivers, and working registers.
While the latch-enable (LE) input is high, the Q outputs followthe data (D) inputs. When LE is taken low, the Q outputs are latchedat the logic levels set up at the D inputs.
A buffered output-enable (
) input can be used to place the eight outputs in eithera normal logic state (high or low logic levels) or high-impedancestate. In the high-impedance state, the outputs neither load nordrive the bus lines significantly. The high-impedance state andincreased drive provide the capability to drive bus lines withoutneed for interface or pullup components.
does not affectthe internal operations of the latches. Old data can be retained ornew data can be entered while the outputs are in the high-impedancestate.
The SN74LV573 is available in TI's shrink small-outline package(DB), which provides the same I/O pin count and functionality ofstandard small-outline packages in less than half theprinted-circuit-board area.
The SN54LV573 is characterized for operation over the fullmilitary temperature range of -55°C to 125°C. The SN74LV573is characterized for operation from -40°C to 85°C.
View more information about generic part numbers:SN74LV573
Go to the Engineering Design Center to locate information on other TI Semiconductor devices.



