SCLS197B - FEBRUARY 1993 - REVISED APRIL 1996
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These octal edge-triggered D-type flip-flops are designed for2.7-V to 5.5-V VCC operation.
The 'LV374 feature 3-state outputs designed specifically fordriving highly capacitive or relatively low-impedance loads. Thesedevices are particularly suitable for implementing buffer registers,I/O ports, bidirectional bus drivers, and working registers.
On the positive transition of the clock (CLK) input, the Q outputsare set to the logic levels set up at the data (D) inputs.
A buffered output-enable (
) input can be used to place the eight outputs in eitheras normal logic state (high or low logic levels) or high-impedancestate. In the high-impedance state, the outputs neither load nordrive the bus lines significantly. The high-impedance state and theincreased drive provide the capability to drive bus lines withoutneed for interface or pullup components.
does not affectinternal operations of the latch. Old data can be retained or newdata can be entered while the outputs are in the high-impedancestate.
The SN74LV374 is available in TI's shrink small-outline package(DB), which provides the same I/O pin count and functionality ofstandard small-outline packages in less than half theprinted-circuit-board area.
The SN54LV374 is characterized for operation over the fullmilitary temperature range of -55°C to 125°C. The SN74LV374is characterized for operation from -40°C to 85°C.
View more information about generic part numbers:SN74LV374
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