



SCLS196C - FEBRUARY 1993 - REVISED APRIL 1996
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These octal transparent D-type latches are designed for 2.7-V to5.5-V VCC operation.
While the latch-enable (LE) input is high, the Q outputs followthe data (D) inputs. When LE is taken low, the Q outputs are latchedat the logic levels set up at the D inputs.
A buffered output-enable
inputcan be used to place the eight outputs in either a normal logic state(high or low) or the high-impedance state. In the high-impedancestate, the outputs neither load nor drive the bus linessignificantly. The high-impedance state and increased drive providethe capability to drive bus lines without need for interface orpullup components.
does not affectthe internal operations of the latches. Old data can be retained ornew data can be entered while the outputs are in the high-impedancestate.
The SN74LV373 is available in TI's shrink small-outline package(DB), which provides the same I/O pin count and functionality ofstandard small-outline packages in less than half theprinted-circuit-board area.
The SN54LV373 is characterized for operation over the fullmilitary temperature range of -55°C to 125°C. The SN74LV373is characterized for operation from -40°C to 85°C.
View more information about generic part numbers:SN74LV373
Go to the Engineering Design Center to locate information on other TI Semiconductor devices.



